feat: 完善Mesh继电器OTA与地址协议

- 增加STM8 Bootloader工程及出厂固件恢复流程\n- 增加W25Q64外部Flash驱动和OTA分包接收、CRC16校验、断点续传状态管理\n- 增加固件版本查询、升级结果上报与主机确认机制\n- 将业务帧从55 AA帧头调整为发送方Mesh短地址+CMD+LEN+DATA+CRC16\n- 修正JDY-28M外层地址与业务发送方地址的职责划分,支持广播请求定向应答\n- 同步更新硬件引脚、存储分区、OTA流程和主机通信协议文档\n- 已使用SDCC重新编译,应用代码大小为5512字节,链接地址为0x8800
This commit is contained in:
十七
2026-11-03 11:29:55 +08:00
parent d275a3523b
commit 42a4650a78
30 changed files with 2318 additions and 108 deletions
+29
View File
@@ -16,6 +16,11 @@
#define GPIOA_DDR_ADDR 0x5002u
#define GPIOA_CR1_ADDR 0x5003u
#define GPIOA_CR2_ADDR 0x5004u
#define GPIOB_ODR_ADDR 0x5005u
#define GPIOB_IDR_ADDR 0x5006u
#define GPIOB_DDR_ADDR 0x5007u
#define GPIOB_CR1_ADDR 0x5008u
#define GPIOB_CR2_ADDR 0x5009u
#define GPIOC_ODR_ADDR 0x500Au
#define GPIOC_IDR_ADDR 0x500Bu
#define GPIOC_DDR_ADDR 0x500Cu
@@ -26,6 +31,10 @@
#define GPIOD_DDR_ADDR 0x5011u
#define GPIOD_CR1_ADDR 0x5012u
#define GPIOD_CR2_ADDR 0x5013u
#define SPI1_CR1_ADDR 0x5200u
#define SPI1_CR2_ADDR 0x5201u
#define SPI1_SR_ADDR 0x5203u
#define SPI1_DR_ADDR 0x5204u
/* UART1 寄存器地址。 */
#define UART1_SR_ADDR 0x5230u
@@ -63,6 +72,7 @@
#define REG8(address) (*((volatile uint8_t *)(address)))
#define PA1_MASK 0x02u
#define PA2_MASK 0x04u
#define PC3_MASK 0x08u
#define PC4_MASK 0x10u
/** PC4 在 STM8S003F3P6 上对应 ADC1 的 AIN2 通道。 */
@@ -72,5 +82,24 @@
#define PD6_MASK 0x40u
#define PC5_MASK 0x20u
#define PC6_MASK 0x40u
#define PC7_MASK 0x80u
#define PD2_MASK 0x04u
#define PD4_MASK 0x10u
#define PB5_MASK 0x20u
#define PB4_MASK 0x10u
#define SPI1_CR1 REG8(SPI1_CR1_ADDR)
#define SPI1_CR2 REG8(SPI1_CR2_ADDR)
#define SPI1_SR REG8(SPI1_SR_ADDR)
#define SPI1_DR REG8(SPI1_DR_ADDR)
#define SPI_CR1_SPE 0x40u
#define SPI_CR1_MSTR 0x04u
#define SPI_CR1_BR0 0x08u
#define SPI_CR1_BR1 0x10u
#define SPI_CR1_BR2 0x20u
#define SPI_CR2_SSI 0x01u
#define SPI_CR2_SSM 0x02u
#define SPI_SR_RXNE 0x01u
#define SPI_SR_TXE 0x02u
#endif